handling speed meaning in Chinese
操纵速度
周转速度
Examples
- The breaking and closing of main loop and grounding ioop aer realized by operating device . the speed is determined by the spring , with no regrad to handling speed . the remote inducting and control are available if equipped with automatic instrument
由独立于开关的手动或电动操动机机构进行主回路，接地回路的分合和开断，开关的分合速度由弹簧决定，与手动速度无关，在加装自动化仪表后，可实现遥感和遥控。 - This thesis combines the merits of distributed system and those of parallel system , and the monolithic processor conjunction distributed system is changed into networked parallel computing conjunction distributed system , which is applied in important component of navy integrated electronic system for the first time - surface vessel command and control system . on account of the handling speed of networked parallel computing conjunction is higher than that of monolithic processor conjunction , so the handling speed of whole distributed system is improved
本文结合了分布式系统和并行系统的优点，将单机结点的分布式系统改造为网络并行计算结点的分布式系统，并首次应用于海军综合电子系统的重要组成部分? ?水面舰载指控系统中，由于网络并行计算结点的处理速度高于单机结点，从而提高了整个分布式系统的处理速度。 - Through adopting have ha the pic only flat machine of buddha structure , not only , have raised the ability of interference rejection with which systematic real time handles speed and has strengthened system ; when exceeding the speed limit , through adopting acousto - optic report to the police remind driver in time accurately will slow down to travel
通过采用具有哈佛结构的pic单片机，不但提高了系统的实时处理速度而且增强了系统的抗干扰能力；在超速时，通过采用声光报警及时准确地提醒司机要减速行驶。 - Parallel structure of poly - phase decomposition and parallel mixer is applied in the ddc circuit , it solves the bottleneck in mixing and increases the handle speed . the partition of the tuning channel according to the digital mixing sequence , and the ddc by means of decimating first , the low - pass filtering and mixing realize efficiently the down - conversion of the variable carrier frequency band - pass signal . according to the structure of the ddc and the requirement of the frequency
短数据快速测频算法的具体实现:使用并行流水线的设计方法,提高了系统的数据吞吐率,在100mhz的系统时钟下,能够实时处理400mhz ~ 600mhz速率a / d采样的数据,在64点采样, 100mhz系统时钟情况下,初次测频占用时间640ns ,以后每次测频占用时间缩短到160ns ,实时地提供多相滤波下变频所需的载频位置信息,缩短了接收机的调谐时间。